IFTLE 597: Samsung Glass Substrates; Samsung SAINT

Samsung Announced Glass Substrates Effort

Samsung Group’s electronics subsidiaries have announced a joint research and development effort between Samsung Electro-Mechanics and the group’s major electronics affiliates, including Samsung Electronics and Samsung Display to accelerate the commercialization of glass substrates to commercialize faster than semiconductor rival Intel in the U.S.

Samsung Electronics is expected to play a role in semiconductor and substrate bonding, while Samsung Display is expected to play a role in glass processing. At CES 2024 in January, Samsung Electro-Mechanics presented its goal of “full-scale mass production of glass substrates in 2026.”

Intel announced in September last year that it would mass-produce glass substrates by 2030. Japan’s Ibiden, the world’s No. 1 semiconductor substrate manufacturer, also announced in October last year that it is focusing on glass substrates as a new business and is starting R&D. In Korea.

As we have discussed in IFTLE, SKC, a subsidiary of SK Group, has established a US subsidiary, Absolics, and is in talks with the world’s leading semiconductor companies, including AMD, to mass-produce glass core substrates.

Samsung SAINT

Samsung just introduced its newest and most advanced chip packaging technology and service roadmap during the Samsung Foundry Forum 2024 event. According to unnamed industry sources quoted by the Korea Economy Daily and Samsung’s own statements, the new tech will debut in HBM4 memory in 2025.

Samsung’s latest 3D packaging technology represents a significant advancement in chip design. Unlike the current “2.5D” stacking, where HBM memory chips connect horizontally to logic chips via a silicon interposer, Samsung’s approach enables “true” vertical stacking between memory chips and logic components. This new technology, known as SAINT (Samsung Advanced Interconnect Technology), eliminates the need for an interposer. However, it requires a new base die for HBM memory, making the process more complex. The result? Faster data transfer rates, cleaner electric signals, reduced power consumption, and lower latency levels. Samsung plans to finalize the SAINT-D process this year, with HBM4 memory technology arriving next year (Figure 1).

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Figure 1: Details of the three types of SAINT devices. (Source: Samsung Electronics)

The tech has been in development for years and includes different approaches for different types of silicon. The SAINT-S solution is for SRAM die-on-logic die stacking, SAINT-L is for logic die-on-logic die stacking, and SAINT-D is for DRAM die-on-logic die stacking.

Companies developing AI accelerators, particularly Nvidia, are Samsung’s main business targets for the new technology, according to Korea Daily. However, SAINT-D will require a chip redesign effort. Putting HBM on a logic die requires an appropriate chip design and we are not aware of any processors from well-known companies that are designed to hold HBM on top and are set to launch in 2024 – 1H 2025 (Figure 2).

Samsung SAINTSamsung SAINT
Figure 2: Samsung AI technology solutions feature advanced heterogeneous integration on a single packaged substrate. Benefits include compact form factor for higher bandwidth density, reduced power consumption and latency, and improved signal integrity. (Source: Samsung)

Samsung plans to offer this advanced 3D HBM packaging as a turnkey service. This means its memory business division will produce HBM chips, and the foundry unit will assemble the processors for fabless companies.

For all the latest in advanced Packaging stay linked to IFTLE………….

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